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Research

Bojie Li (李博杰). I work on AI agents and personalization, LLM systems, and datacenter networking. Below are recent papers — most with an interactive companion site — followed by earlier systems research.

Recent work

2026 · click a title for the interactive site or the paper
cs.AIarXiv:2607.12520

The Model Knows Your Project, Not You: Measuring Recognition in LLMs with NameRank

What do frontier models actually recall about people and tools from their weights? NameRank scores recognition (0–1) across 4,685 entities, 54 cohorts, and 36 models, with judges verifying specific facts — hallucination, context echo, and guesses earn nothing. Citations explain only a third; named artifacts, methods, and papers propagate over credentials, titles, or contributor listings, and no bibliometric predicts recognition well.

cs.AIarXiv:2607.11598

Interaction Scaling: Grounding the Third Axis of Test-Time Compute

Beyond reasoning and sampling lies a third axis of test-time compute: the model proposes an artifact, an external instrument observes how it actually behaves, and the model revises. Reasoning-only and best-of-N plateau on hard coding tasks, but interaction keeps improving — a proposer-reviewer reaches perfect accuracy across three model families, and layout tools catch rendering defects that vision judges call perfect.

cs.LGarXiv:2607.07435

RLVP: Penalize the Path, Reward the Outcome

Agents acting in the real world must respect outcome-neutral constraints — business hours, authentication, not re-calling an unresponsive user — that outcome rewards can't express, since violating them often boosts apparent success. Because group-relative advantage is within-group variance, a verifiable path penalty supplies the missing signal: penalize the path, reward the outcome — high success, near-zero violations.

cs.DCarXiv:2607.02630

Fine-Grained Computation Offload for Off-the-Shelf Servers in Tens of Lines

Accelerator stalls needn't force a rewrite: the concurrency already exists, because serving concurrent requests already suspends and resumes them. Framing overlap as routing, an offload submits to an executor and the request suspends via the server's own deferred-response path — 22–138 lines across ten production servers for 1.2–5.4× gains, and 17.3× from an LD_PRELOAD fiber runtime.

cs.AIarXiv:2606.30383

Whose Side Is Your Agent On? Multi-Party Principal Loyalty in LLM Agents

When an agent represents a principal while talking to a counterparty whose interests diverge, "help whoever you're talking to" is the wrong objective. PrincipalBench measures multi-party loyalty across 13 frontier models, exposing a sharp selective/over-refusing split; a prompt-time scaffold and per-token-KL distillation make small models loyal — but both only move along a leak/over-refusal trade-off.

cs.AIarXiv:2606.29472

Agent-Computer Observation Interfaces Enable Dynamic Computer Use

Computer-use agents tie observation to action — one screenshot every few seconds, no audio — leaving them blind between frames. AOI, a model-agnostic perception layer, decouples continuous observation via gated keyframe capture, volume-gated transcription, and persistent visual narration, adding almost nothing on static content yet gaining +17 to +48 pp on DynaCU-Bench with zero retraining.

cs.AIarXiv:2606.19172

User as Engram: Internalizing Per-User Memory as Local Parametric Edits

Personal memory is two problems — content and reasoning skill — that the brain keeps apart. Rather than folding both into a per-user LoRA that contaminates unrelated text, User as Engram stores a user's facts as surgical rows in a hash-keyed table and carries reasoning in one shared adapter: 5.6× better indirect reasoning, ~33,000× smaller, users composing losslessly.

cs.AIarXiv:2606.17929

PreAct: Computer-Using Agents that Get Faster on Repeated Tasks

Computer-using agents solve every task from scratch, re-reading the screen and re-reasoning each tap. PreAct compiles the first success into a small state-machine program and replays it 8.5–13× faster with no per-step model calls, checking the screen matches before each action; an independent evaluator gates what enters the store, so repeated tasks get faster without getting riskier.

cs.LGarXiv:2606.17107

Models Take Notes at Prefill: KV Cache Can Be Editable and Composable

Prefix caching reuses prefill only across a shared prefix, so one changed field invalidates everything downstream. Yet across four model families the field's own key/value drives under 1% of the decision — at prefill the model already wrote its conclusion onto downstream tokens. Read as memoized notes, the KV cache becomes editable and composable, decision-identical at 14.9× lower latency.

cs.AIarXiv:2606.16707

User as Code: Executable Memory for Personalized Agents

Bag-of-facts user memory recalls individual facts but can't aggregate, resolve contradictions, or enforce rules, because storing a fact and acting on it are separate steps. User as Code makes memory executable: typed Python objects hold state, functions encode rules, an append-only log checkpoints into code. Recall stays strong (78.8% LOCOMO) while aggregate questions jump from 6–43% to 99%.

cs.ARarXiv:2606.13708

Tiara: A Programmable Line-Rate ISA for Remote Memory Access

RDMA one-sided verbs need the exact remote address, so 1-RTT performance breaks when that address must first be read from remote memory — the Indirection Wall behind graph traversals, page-table walks, and paged KV lookups. Tiara, a statically verifiable instruction set on the memory-side NIC, resolves indirection locally, collapsing multi-RTT dependent chains into a single round-trip.

cs.AIarXiv:2605.28717

OpenURMA: A Clean-Room Open Implementation of the Unified Bus Protocol

Datacenter RDMA is bottlenecked at the NIC, not the wire: per-connection state balloons at high fanout and a 64-byte op pays a four-traversal PCIe round-trip. Huawei's Unified Bus decouples endpoint from transport state and reaches memory via native load/store. OpenURMA is the first clean-room open implementation — a 64-byte fetch in ~500 ns, 4.37× below a matched RoCEv2 baseline.

cs.LGarXiv:2604.24827

Incompressible Knowledge Probes: Estimating Black-Box LLM Parameter Counts via Factual Capacity

Frontier labs don't disclose parameter counts, yet storing F facts requires at least F/(bits per parameter) weights — so factual recall lower-bounds model size. Incompressible Knowledge Probes ask 1,400 facts that resist reasoning and compression, calibrating a log-linear map to parameter count across 93 open-weight models (R²=0.910). The instrument is deliberately coarse — order-of-magnitude capacity, not precise counts.

cs.MMarXiv:2604.20940

Sema: Semantic Transport for Real-Time Multimodal Agents

Real-time multimodal agents transport raw audio and screenshots over stacks built for human perception, but agents consume task-relevant semantics, not reconstructed signals — shifting transport from signal fidelity to meaning preservation. Sema pairs discrete audio tokens with a hybrid screen representation and bursty delivery, cutting uplink bandwidth 64× for audio and 130–210× for screenshots within 0.7 pp of raw accuracy.

Earlier systems research

datacenter networking, RDMA, and programmable hardware

Lead author

APNet'23

FastWake

Polling gives RDMA low latency but pins a core to one thread; interrupts share cores at far higher latency, and apps with hundreds of threads are stuck paying it. FastWake redesigns the interrupt-mode host stack on commodity hardware and unmodified apps — a per-core dispatcher polls every completion queue and context-switches via a kernel fast path — approaching hardware latency limits.

MICRO'20PLDI'21

AKG

Tensor compilers work well for CPUs and GPUs but struggle on NPUs, with their heterogeneous compute units and complicated memory hierarchy. AKG lowers a tensor expression language to a polyhedral representation and leans on polyhedral schedulers — rather than hand-written schedules — to automate NPU memory management and combine complex tiling with hierarchical fusion, generating efficient kernels automatically.

SIGCOMM'21

1Pipe

1Pipe is a communication abstraction that delivers groups of messages to different receivers in a consistent causal and total order — unicast and scattering alike — with best-effort at-most-once and reliable atomic variants. Using in-network computation on Barefoot or Arista switches, it scales with low CPU and network overhead, simplifying and accelerating transactional key-value stores, log replication, and distributed coordination.

SIGCOMM'19

SocksDirect

Communication-intensive apps on multi-core hosts with fast NICs stress the OS socket stack, yet existing replacements sacrifice performance, compatibility, or isolation. SocksDirect is a user-space socket, a drop-in Linux replacement needing no app changes, using RDMA between hosts and shared memory within a host, a trusted monitor daemon for isolation, and common-case optimizations — high throughput at low latency.

SOSP'17

KV-Direct

As key-value stores become datacenter infrastructure and network bandwidth outruns CPUs, the bottleneck shifts from network to CPU, and plain RDMA offers only limited primitives. KV-Direct uses a programmable NIC to extend RDMA with remote direct key-value access to host memory, maximizing throughput and hiding the PCIe latency that becomes the new bottleneck — 180M ops/s per NIC.

SIGCOMM'16

ClickNP

Software network functions are flexible but limited in capacity and high in latency; scaling out with more servers is costly. FPGAs are fast and cheap but programmed in low-level HDLs that most software developers can't touch. ClickNP makes FPGA-accelerated network functions fully programmable in a high-level, modular C-like language, delivering high flexibility with 200M pps at sub-2µs latency.

Bachelor's thesis

FTRouter

Traditional routers need a cold reboot when any software component fails or is upgraded, interrupting traffic for minutes. FTRouter is a fault-tolerant SDN router architecture — routing and admin clients, a router information base (MiniDB), a conflict-resolving daemon (SyncD), and a programmable-switch SDK — letting any component fail or upgrade without touching the data plane, with predictable control-plane recovery.

Co-author

NSDI'18

MP-RDMA

RDMA is fast but single-path, prone to failures and unable to exploit the many parallel paths in datacenters; prior multipath work targeted TCP. MP-RDMA brings multipath transport to RDMA under tight NIC memory: multi-path ACK-clocking spreads traffic congestion-aware without per-path state, out-of-order-aware path selection bounds reordering, and a synchronize mechanism ensures in-order memory updates — adding only 66B on-chip state.

APNet'19ICNP'21IEEE ToN'25

Stateless RNIC / StaR

RDMA NICs hold per-flow transport state in tiny on-chip memory; once flows exceed capacity, states swap to host memory over PCIe and performance collapses. This stateless hardware transport keeps no per-flow state — flow state bounces between the two end hosts alongside each data packet, like an always-in-flight thread that can fork, throttle, and merge to emulate window-based congestion control.

APNet'17

MELO

Constrained by small on-chip memory, hardware transports default to go-back-N loss recovery, which wastes bandwidth even at low loss. MELO adds efficient selective retransmission using constant memory regardless of connection count, separating data from metadata storage and sharing a bit-pool allocation. At just ~23B extra on-chip state per connection, it delivers 14× throughput and 3.11× lower tail FCT.

ATC'16

FUSO

Achieving low flow completion time in datacenters demands rapid loss recovery without adding congestion. FUSO exploits multi-path diversity: when a sender suspects loss on one subflow, it immediately sends recovery packets over another, less-lossy subflow with spare congestion window — fast because it needn't wait for timeout, cautious because it respects congestion control. Up to 82–88% lower 99th-percentile FCT.

APSys'17

Feniks

As cloud providers deploy FPGAs into datacenters for acceleration, large-scale operation needs OS support. Feniks is an FPGA operating system that abstracts hardware details from accelerator developers and provides a runtime for accelerators to share one chip efficiently, direct access to server storage and coprocessors over PCIe, and datacenter-wide FPGA resource allocation.

Preliminary work

FTLinux

Fault tolerance is critical for distributed applications, yet many — Node.js, Memcached, Python in TensorFlow — don't support it, and fault-tolerant systems are often slower. FTLinux takes on transparent, efficient fault tolerance for general distributed apps on commodity Linux, tackling process migration, deterministic replay, and distributed snapshot, and navigating the trade-offs of fault tolerance at different abstraction levels.

ReactDB

Analytical queries run for minutes to hours, and when data updates the user must re-run them on a fresh snapshot — again slowly, against stale results. ReactDB is a real-time analytical database reactive to updates: it caches intermediate results of repetitive queries and incrementally refreshes them and ongoing transactions as data changes, so business intelligence reacts in real time.

P4Coder

Programmable switches and NICs offload network functions but have limited resources and constrained programming models, so developers split a function into a hardware data plane (in P4) and a software control plane — and writing those packet programs by hand is hard labor. P4Coder specializes network applications into packet programs automatically by learning the application's common-case behavior.

PCIe Gateway

Datacenter servers host more and more PCIe devices — GPUs, NVMe SSDs, NICs, FPGAs — often talking CPU-bypass (GPU-Direct, NVMe-oF), yet their register and DMA interfaces are intricate and undocumented, and PCIe protocol analyzers cost ~$250K and can't modify traffic. This transparent PCIe debugger and gateway, on a commodity FPGA board, captures and rewrites TLP packets bump-in-the-wire between device and CPU.

Engineering

USTC icourse.club

A community course-review site for the University of Science and Technology of China, where students rate and review courses and instructors to help peers choose what to take. Built and operated since undergraduate years, it has grown to 6,000+ users and 16,000+ reviews, and is fully open source under the AGPL.

HTTPS Accelerator

HTTPS secures most web traffic, but its most computationally intensive part is the TLS-handshake authentication: enabling HTTPS drops a CPU core's throughput ~35× versus plaintext. This joint Microsoft Hackathon 2016 project builds a scalable, efficient FPGA-based HTTPS accelerator that offloads RSA in the TLS handshake, reaching the handshake throughput of roughly 20 CPU cores.

LUG VPN

Not every IP is reachable from everywhere — NAT, firewalls, and policies get in the way — and direct routing isn't always best, while TCP Cubic performs poorly on long fat pipes with loss. Since 2013, LUG VPN forwards traffic among global gateway servers to pick an optimal egress: over a thousand users, ~1 TB daily across tens of datacenters.